THREE-DIMENSIONAL PHASE CHANGE MEMORY
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United States of America Patent
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Issued Date -
Oct 6, 2011
app pub date -
Apr 4, 2011
filing date -
Apr 5, 2010
priority date (Note) -
Abandoned
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Abstract
A memory device includes a stack of semiconductor layers. A circuit is on a layer of the stack of semiconductor layers. A primary memory array is on another layer of the stack of semiconductor layers different from the layer comprising the circuit. A plurality of electrical communication paths are between the circuit and the primary memory array. The circuit controls the operation of the primary memory array over the electrical communication paths.
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