INTEGRATED CIRCUIT PACKAGE STACKING SYSTEM WITH LEAD OVERLAP AND METHOD OF MANUFACTURE THEREOF
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United States of America Patent
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N/A
Issued Date -
Oct 13, 2011
app pub date -
May 18, 2010
filing date -
Apr 9, 2010
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A method of manufacture of an integrated circuit package stacking system includes: providing a bottom package including: providing a first lead frame, forming a bottom package body having the first lead frame in an off-centered parting line position, and forming bottom connection leads of the first lead frame for providing coplanar contacts at an end of the bottom connection leads; mounting a top package on the bottom package including: providing a second lead frame, forming a top package body on the second lead frame, and reforming top connection leads of the second lead frame for over-lapping contact areas on the bottom connection leads of the bottom package; and applying a conductive adhesive on the contact areas for electrically connecting the top connection leads and the bottom connection leads.
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