EPITAXIAL WAFER HAVING A HEAVILY DOPED SUBSTRATE AND PROCESS FOR THE PREPARATION THEREOF

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

13165430

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
MEMC ELECTRONIC MATERIALS INCST PETERS MO 63376

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Chanrae Austin, US 6 35
Falster, Robert J London, GB 88 1010
Lee, DongMyun Lake Saint Louis, US 5 34
Moiraghi, Luca Milano, IT 10 60
Ravani, Marco Novara, IT 7 80
Voronkov, Vladimir V Merano, IT 23 397

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation