Semiconductor arrangement, semiconductor module, and method for connecting a semiconductor chip to a ceramic substrate
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United States of America Patent
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Nov 24, 2015
Grant Date -
Dec 29, 2011
app pub date -
Sep 7, 2011
filing date -
Oct 20, 2006
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Abstract
A semiconductor arrangement includes a silicon body having a top surface and a bottom surface, and a thick metal layer arranged on the top surface of the silicon body. The thick metal layer has a bonding surface facing away from the top surface of the silicon body. A bonding wire or a ribbon is bonded to the thick metal layer at the bonding surface of the thick metal layer. The thickness of the thick metal layer is at least 10 micrometers (μm), the thick metal layer comprises copper or a copper alloy, and the bonding wire or ribbon comprises copper or a copper-based material.
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