Discovery by operating system of information relating to adapter functions accessible to the operating system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8621112
APP PUB NO 20110320637A1
SERIAL NO

12821185

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A tiered discovery capability is employed to obtain attributes regarding adapters of an I/O configuration. The first tier obtains a list of the adapter functions accessible to an operating system; the second tier obtains attributes regarding a selected adapter function of the list of adapter functions; and a third tier obtains common attributes of a group of adapter functions, the group including the selected adapter function.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
INTERNATIONAL BUSINESS MACHINES CORPORATIONARMONK, NY44232

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Coneski, Anthony F Newburgh, US 11 60
Craddock, David New Paltz, US 52 874
Gainey,, Jr Charles W Poughkeepsie, US 119 1043
Glendening, Beth A Poughkeepsie, US 19 168
Gregg, Thomas A Highland, US 181 2475
Njoku, Ugochukwu C Yonkers, US 24 777

Cited Art Landscape

Patent Info (Count) # Cites Year
 
VIA TECHNOLOGIES, INC. (1)
7506087 Method for configuring a Peripheral Component Interconnect Express (PCIE) 37 2006
 
Pericom Semiconductor Corp. (1)
7107384 Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths 42 2004
 
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (3)
5819053 Computer system bus performance monitoring 63 1996
6581130 Dynamic remapping of address registers for address translation between multiple busses 32 2000
7613847 Partially virtualizing an I/O device for use by virtual machines 71 2006
 
EMC IP HOLDING COMPANY LLC (2)
7328296 Interrupt processing system 14 2006
7398343 Interrupt processing system 44 2006
 
CADENCE DESIGN SYSTEMS, INC. (1)
5551013 Multiprocessor for hardware emulation 343 1994
 
MICRON TECHNOLOGY, INC. (1)
6330647 Memory bandwidth allocation based on access count priority scheme 54 1999
 
LENOVO INTERNATIONAL LIMITED (1)
* 6557035 Rules-based method of and system for optimizing server hardware capacity and performance 83 1999
 
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE (1)
2006/0064,618 Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification 18 2004
 
HITACHI, LTD. (1)
2009/0276,774 Access control for virtual machines in an information system 106 2008
 
INFOTONE COMMUNICATIONS CORPORATION (1)
2002/0161,907 Adaptive multi-protocol communications system 155 2002
 
ORACLE AMERICA, INC. (2)
6704831 Method and apparatus for converting address information between PCI bus protocol and a message-passing queue-oriented bus protocol 92 2000
7567567 Network system including packet classification for partitioned resources 49 2005
 
TWITTER, INC. (1)
2007/0186,074 MULTIPLE PAGE SIZE ADDRESS TRANSLATION INCORPORATING PAGE SIZE PREDICTION 47 2007
 
NEC CORPORATION (3)
5430856 Data processing system simultaneously performing plural translations of virtual addresses having different page sizes 48 1992
7623460 Cluster system, load distribution method, optimization client program, and arbitration server program 102 2007
2008/0222,406 Hot-pluggable information processing device and setting method 42 2008
 
APPLE INC. (3)
5574873 Decoding guest instruction to directly access emulation routines that emulate the guest instructions 298 1995
5790825 Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions 302 1997
7624235 Cache used both as cache and staging buffer 46 2006
 
SONY ERICSSON MOBILE COMMUNICATIONS AB (1)
2009/0222,814 SELECTIVE EXPOSURE TO USB DEVICE FUNCTIONALITY FOR A VIRTUAL MACHINE 70 2008
 
REALTEK SEMICONDUCTOR CORP. (1)
6978338 PCI extended function interface and PCI device using the same 34 2002
 
CALLAHAN CELLULAR L.L.C. (1)
6067595 Method and apparatus for enabling high-performance intelligent I/O subsystems using multi-port memories 123 1997
 
AVAYA INC. (1)
5838960 Apparatus for performing an atomic add instructions 50 1996
 
KEY CORPORATE CAPITAL, INC. (1)
6996638 Method, system and program products for enhancing input/output processing for operating system images of a computing environment 51 2003
 
MICROSOFT TECHNOLOGY LICENSING, LLC (7)
5802590 Method and system for providing secure access to computer resources 128 1994
5901312 Providing application programs with unmediated access to a contested hardware resource 45 1994
2006/0101,181 Method and system for dynamically patching an operating system's interrupt mechanism 25 2004
7225287 Scalable DMA remapping on a computer bus 29 2005
7475183 Large page optimizations in a virtual machine environment 40 2005
2009/0328,035 Lazy Handling of End of Interrupt Messages in a Virtualized Environment 48 2008
8112556 Method and apparatus for detecting the type of interface to which a peripheral device is connected 15 2011
 
INTELLECTUAL VENTURES II LLC (1)
6205530 Address translation unit supporting variable page sizes 60 1998
 
LENOVO (SINGAPORE) PTE LTD. (1)
5465332 Selectable 8/16 bit DMA channels for "ISA" bus 70 1992
 
GOOGLE INC. (6)
6078970 System for determining adapter interrupt status where interrupt is sent to host after operating status stored in register is shadowed to host memory 81 1997
6715011 PCI/PCI-X bus bridge with performance monitor 28 2000
6654818 DMA access authorization for 64-bit I/O adapters on PCI bus 56 2000
7260664 Interrupt mechanism on an IO adapter that supports virtualization 51 2005
2006/0195,644 Interrupt mechanism on an IO adapter that supports virtualization 42 2005
7526592 Interrupt control system and storage control system using the same 20 2006
 
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE (1)
2004/0122,988 System for controlling data transfer protocol with a host bus interface 20 2003
 
SANDISK IL LTD. (1)
2009/0172,211 STORAGE DEVICE WITH TRANSACTION LOGGING CAPABILITY 40 2007
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (7)
5875343 Employing request queues and completion queues between main processors and I/O processors wherein a main processor is interrupted when a certain number of completion messages are present in its completion queue 106 1997
2004/0117,534 Apparatus and method for dynamically enabling and disabling interrupt coalescing in data processing system 49 2002
2004/0199,700 Virtual peripheral component interconnect multiple-function device 40 2003
2004/0236,880 Dynamically self-adjusting polling mechanism 26 2003
2007/0028,087 Method and system for reducing instruction storage space for a processor integrated in a network adapter chip 26 2005
7552298 Method and system for deferred pinning of host memory for stateful network interfaces 36 2006
2008/0091,868 Method and System for Delayed Completion Coalescing 53 2007
 
CANON KABUSHIKI KAISHA (2)
2001/0021,971 SYSTEM FOR EXECUTING INSTRUCTIONS HAVING FLAG FOR INDICATING DIRECT OR INDIRECT SPECIFICATION OF A LENGTH OF OPERAND DATA 28 1998
2008/0114,734 INFORMATION PROCESSING METHOD AND SYSTEM 25 2007
 
MICRO FOCUS SOFTWARE INC. (1)
6792492 System and method of lowering overhead and latency needed to service operating system interrupts 37 2001
 
QUALCOMM INCORPORATED (1)
2008/0091,851 System and method for dynamic audio buffer management 47 2006
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (86)
5282274 Translation of multiple virtual pages upon a TLB miss 86 1990
5170472 Dynamically changing a system I/O configuration definition 153 1991
5600805 Pass-through for I/O channel subsystem call instructions for accessing shared resources in a computer system having a plurality of operating systems 151 1992
5265240 Channel measurement method and means 66 1992
5465355 Establishing and restoring paths in a data processing I/O system 70 1993
5742785 Posting multiple reservations with a conditional store atomic operations in a multiprocessing environment 105 1995
5875463 Video processor with addressing mode control 31 1997
6009261 Preprocessing of stored target routines for emulating incompatible instructions on a target processor 297 1997
6023736 System for dynamically configuring I/O device adapters where a function configuration register contains ready/not ready flags corresponding to each I/O device adapter 75 1997
6397350 Method of providing direct data processing access using a queued direct input-output device 23 1999
6519645 Method and apparatus for providing configuration information using a queued direct input-output device 51 1999
6330656 PCI slot control apparatus with dynamic configuration for partitioned systems 88 1999
6578191 Method and apparatus for dynamic generation of adapters 55 1999
6529978 Computer input/output (I/O) interface with dynamic I/O adaptor processor bindings 44 2000
6963940 Measuring utilization of individual components of channels 55 2000
6629175 Efficient adapter context switching 34 2000
6721839 Method of mapping multiple address spaces into single PCI bus 43 2000
6658521 Method and apparatus for address translation on PCI bus over infiniband network 66 2001
6820164 PERIPHERAL COMPONENT INTERCONNECT BUS DETECTION IN LOGICALLY PARTITIONED COMPUTER SYSTEM INVOLVING AUTHORIZING GUEST OPERATING SYSTEM TO CONDUCT CONFIGURATION INPUT-OUTPUT OPERATION WITH FUNCTIONS OF PCI DEVICES 38 2001
* 2002/0152,334 Method for PCI bus detection in a logically partitioned system 26 2001
2003/0056,155 Method and apparatus for filtering error logs in a logically partitioned data processing system 52 2001
2003/0074,541 Table offset for shortening translation tables from their beginnings 25 2001
2004/0093,452 Intelligent interrupt with hypervisor collaboration 15 2001
6901537 Method and apparatus for preventing the propagation of input/output errors in a logical partitioned data processing system 43 2002
7302692 Locally providing globally consistent information to communications layers 38 2002
2004/0049,600 Memory management offload for RDMA enabled network adapters 45 2002
2004/0064,618 Method and apparatus for controlling the execution of a broadcast instruction on a guest processor of a guest multiprocessing configuration 41 2002
2004/0139,304 High speed virtual instruction execution mechanism 53 2003
2004/0139,305 Hardware-enabled instruction tracing 32 2003
2004/0025,166 Server computer and a method for accessing resources from virtual machines of a server computer via a fibre channel 98 2003
7139940 Method and apparatus for reporting global errors on heterogeneous partitioned systems 37 2003
7127599 Managing configurations of input/output system images of an input/output subsystem, wherein a configuration is modified without restarting the input/output subsystem to effect a modification 44 2003
7130938 Method, system and program products for identifying communications adapters of a computing environment 40 2003
7174550 Sharing communications adapters across a plurality of input/output subsystem images 40 2003
7177961 Managing access, by operating system images of a computing environment, of input/output resources of the computing environment 41 2003
2005/0071,472 Method and system for hardware enforcement of logical partitioning of a channel adapter's resources in a system area network 56 2003
* 2005/0114,586 Memory mapped Input/Output virtualization 34 2003
2005/0114,623 Memory mapped input/output emulation 33 2003
7277968 Managing sets of input/output communications subadapters of an input/output subsystem 34 2004
7530071 Facilitating access to input/output resources via an I/O partition shared by multiple consumer partitions 48 2004
2006/0005,083 Performance count tracing 54 2004
7418572 Pretranslating input/output buffers in environments with multiple page sizes 35 2004
7296120 Mechanism that provides efficient multi-word load atomicity 37 2004
2006/0130,071 Method, system and program product for correlating data between operating environments 36 2004
* 7886086 Method and apparatus for restricting input/output device peer-to-peer operations in a data processing system to improve reliability, availability, and serviceability 23 2005
7464191 System and method for host initialization for an adapter that supports virtualization 24 2005
7493425 Method, system and program product for differentiating between virtual hosts on bus transactions and associating allowable memory access for an input/output adapter that supports virtualization 33 2005
2006/0195,617 Method and system for native virtualization on a partially trusted adapter using adapter bus, device and function number for identification 84 2005
7200704 Virtualization of an I/O adapter port using enablement and activation functions 91 2005
2006/0230,208 System and method for presenting interrupts 41 2005
7502872 Method for out of user space block mode I/O directly between an application instance and an I/O adapter 17 2005
2007/0168,934 Integrated code generation for adapter-specific property template 26 2005
2007/0136,554 Memory operations in a virtualized system 71 2005
2007/0245,041 Method to improve system DMA mapping while substantially reducing memory fragmentation 44 2006
2007/0234,018 Method to Detect a Stalled Instruction Stream and Serialize Micro-Operation Execution 39 2006
2007/0260,768 STALLING OF DMA OPERATIONS IN ORDER TO DO MEMORY MIGRATION USING A MIGRATION IN PROGRESS BIT IN THE TRANSLATION CONTROL ENTRY MECHANISM 34 2006
2007/0271,559 Virtualization of infiniband host channel adapter interruptions 53 2006
7380041 Managing input/output interruptions in non-dedicated interruption hardware environments 42 2006
7496707 Dynamically scalable queues for performance driven PCI express memory traffic 50 2006
7549090 Autonomic recovery from hardware errors in an input/output fabric 39 2006
2008/0126,648 Message Signaled Interrupt Management for a Computer Input/Output Fabric Incorporating Platform Independent Interrupt Manager 55 2006
2008/0091,915 Apparatus and Method for Communicating with a Memory Registration Enabled Adapter Using Cached Address Translations 78 2006
2008/0098,197 Method and System For Address Translation With Memory Windows 23 2006
7529860 System and method for configuring an endpoint based on specified valid combinations of functions 54 2006
2008/0148,295 SYSTEM AND METHOD FOR MIGRATION OF SINGLE ROOT STATELESS VIRTUAL FUNCTIONS 54 2006
7617340 I/O adapter LPAR isolation with assigned memory space 49 2007
2008/0168,208 I/O Adapter LPAR Isolation In A Hypertransport Environment With Assigned Memory Space Indexing a TVT Via Unit IDs 47 2007
7606965 Information handling system with virtualized I/O adapter ports 42 2007
7617345 Prioritization of interrupts in a storage controller based on interrupt control directives received from hosts 44 2007
2009/0024,823 OVERLAYED SEPARATE DMA MAPPING OF ADAPTERS 25 2007
7454548 Managing input/output interruptions in non-dedicated interruption hardware environments, and methods therefor 38 2007
7587531 Multiple logical input/output subsystem facility 34 2007
2009/0144,731 SYSTEM AND METHOD FOR DISTRIBUTION OF RESOURCES FOR AN I/O VIRTUALIZED (IOV) ADAPTER AND MANAGEMENT OF THE ADAPTER THROUGH AN IOV MANAGEMENT PARTITION 77 2007
7600053 Emulation of extended input/output measurement block facilities 74 2007
2009/0182,966 DYNAMIC ADDRESS TRANSLATION WITH FRAME MANAGEMENT 72 2008
2009/0182,969 DYNAMIC ALLOCATION OF DMA BUFFERS IN INPUT/OUTPUT ADAPTORS 43 2008
2009/0210,646 Cross Adapter Shared Address Translation Tables 44 2008
2009/0276,775 PCI Function South-Side Data Management 32 2008
2008/0235,425 MANAGING INPUT/OUTPUT INTERRUPTIONS IN NON-DEDICATED INTERRUPTION HARDWARE ENVIRONMENTS 43 2008
2010/0082,855 ASSOCIATING PROCESS PRIORITY WITH I/O QUEUING 22 2008
2009/0144,462 Method and System for Fully Trusted Adapter Validation of Addresses Referenced in a Virtual Host Transfer Request 48 2008
2009/0125,666 DYNAMICALLY SCALABLE QUEUES FOR PERFORMANCE DRIVEN PCI EXPRESS MEMORY TRAFFIC 46 2009
2009/0240,849 System and Method for Distributing Virtual Input/Output Operations Across Multiple Logical Partitions 45 2009
8504754 Identification of types of sources of adapter interruptions 7 2010
2011/0321,061 CONVERTING A MESSAGE SIGNALED INTERRUPTION INTO AN I/O ADAPTER EVENT NOTIFICATION 19 2010
2013/0067,194 TRANSLATION OF INPUT/OUTPUT ADDRESSES TO MEMORY ADDRESSES 15 2012
 
ADVANCED MICRO DEVICES, INC. (5)
6308255 Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system 290 1998
* 6968446 Flags handling for system call instructions 25 2001
2008/0114,906 Efficiently Controlling Special Memory Mapped System Accesses 47 2006
2007/0168,636 Chained Hybrid IOMMU 48 2007
2007/0168,644 Using an IOMMU to Create Memory Archetypes 43 2007
 
LENOVO PC INTERNATIONAL (1)
6772264 Enabling a docking station for ISA adapters 49 2000
 
Advanced System Products, Inc. (1)
5586268 Multiple peripheral adapter device driver architecture 64 1995
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (3)
5535352 Access hints for input/output address translation mechanisms 71 1994
6493741 Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit 111 1999
2004/0073,905 Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit 64 2003
 
ZIILABS INC., LTD. (1)
5960213 Dynamically reconfigurable multi-function PCI adapter device 104 1996
 
CISCO TECHNOLOGY, INC. (1)
6408347 Integrated multi-function adapters using standard interfaces through single a access point 63 1998
 
NATIONAL INSTRUMENTS CORPORATION (1)
7631097 Method and apparatus for optimizing the responsiveness and throughput of a system performing packetized data transfers using a transfer count mark 46 2005
 
GLOBALFOUNDRIES INC. (2)
7209994 Processor that maintains virtual interrupt state and injects virtual interrupts into virtual machine guests 93 2005
2007/0168,643 DMA Address Translation in an IOMMU 56 2007
 
TERADATA US, INC. (1)
5761448 Physical-to-logical bus mapping scheme for computer systems having multiple PCI bus configuration 86 1996
 
FUJITSU LIMITED (2)
5822616 DMA controller with prefetch cache rechecking in response to memory fetch decision unit's instruction when address comparing unit determines input address and prefetch address coincide 47 1996
6463582 Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method 427 1998
 
SUN MICROSYSTEMS, INC. (3)
2004/0015,622 Method and apparatus for implementing PCI DMA speculative prefetching in a message passing queue oriented bus system 31 2003
2006/0253,619 Virtualization for device sharing 171 2005
2009/0089,780 METHOD AND APPARATUS TO CONVEY PHYSICAL RESOURCE RELATIONSHIPS 30 2007
 
DELL PRODUCTS L.P. (1)
2009/0070,760 Virtual Machine (VM) Migration Between Processor Architectures 67 2007
 
INTEL CORPORATION (23)
5617554 Physical address size selection and page size selection in an address translator 133 1994
5870598 Method and apparatus for providing an optimized compare-and-branch instruction 64 1997
6349380 Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor 61 1999
6615305 Interrupt pacing in data transfer unit 60 1999
6772097 Retrieving I/O processor performance monitor data 27 1999
6907510 Mapping of interconnect configuration space 57 2002
7065598 Method, system, and article of manufacture for adjusting interrupt levels 48 2002
6970992 Apparatus to map virtual pages to disparate-sized, non-contiguous real pages and methods relating thereto 34 2003
2005/0289,271 Circuitry to selectively produce MSI signals 50 2004
7496706 Message signaled interrupt redirection table 23 2004
7334107 Caching support for direct memory access address translation 49 2004
7340582 Fault processing for direct memory access address translation 38 2004
7444493 Address translation for input/output devices using hierarchical translation tables 41 2004
7516252 Port binding scheme to create virtual host bus adapter in a virtualized multi-operating system platform environment 26 2005
2006/0288,130 Address window support for direct memory access translation 60 2005
7546487 OS and firmware coordinated error handling using transparent firmware intercept and firmware services 47 2005
2007/0073,955 Multi-function PCI device 42 2005
2007/0226,386 Method and apparatus for using a single multi-function adapter with different operating systems 57 2006
2008/0126,652 Managing Interrupts in a Partitioned Platform 72 2006
7546406 Virtualization of a global interrupt queue 44 2007
2010/0005,234 Enabling functional dependency in a multi-function device 46 2008
2010/0169,528 Interrupt technicques 22 2008
2011/0153,893 Source Core Interrupt Steering 20 2009
 
HARRIS CORPORATION (1)
5053952 Stack-memory-based writable instruction set computer having a single data bus 35 1987
 
TEXAS INSTRUMENTS INCORPORATED (5)
5826084 Microprocessor with circuits, systems, and methods for selectively bypassing external interrupts past the monitor program during virtual program operation 57 1997
5974440 Microprocessor with circuits, systems, and methods for interrupt handling during virtual task operation 35 1997
7509391 Unified memory management system for multi processor heterogeneous architecture 31 1999
2005/0033,895 System for signaling serialized interrupts using message signaled interrupts 42 2003
2009/0049,220 INTERRUPT-RELATED CIRCUITS, SYSTEMS, AND PROCESSES 87 2008
 
NVIDIA CORPORATION (3)
7412488 Setting up a delegated TCP connection for hardware-optimized processing 37 2003
7420931 Using TCP/IP offload to accelerate packet filtering 59 2004
7627723 Atomic memory operators in a parallel processor 92 2006
 
WIND RIVER SYSTEMS, INC. (1)
5995745 Adding real-time support to general purpose operating systems 95 1997
 
ARM FINANCE OVERSEAS LIMITED (1)
2009/0249,039 Providing Extended Precision in SIMD Vector Arithmetic Operations 44 2009
 
SOLARFLARE COMMUNICATIONS, INC. (1)
7562366 Transmit completion event batching 52 2005
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
9384158 Dynamic universal port mode assignment 0 2014
9547613 Dynamic universal port mode assignment 0 2014
* Cited By Examiner

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
3.5 Year Payment $1600.00 $800.00 $400.00 Jun 30, 2017
7.5 Year Payment $3600.00 $1800.00 $900.00 Jun 30, 2021
11.5 Year Payment $7400.00 $3700.00 $1850.00 Jun 30, 2025
Fee Large entity fee small entity fee micro entity fee
Surcharge - 3.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00