Memory systems and methods for dividing physical memory locations into temporal memory locations

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8281055
APP PUB NO 20120039139A1
SERIAL NO

13282184

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Abstract

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Described are memory modules that support dynamic point-to-point extensibility using fixed-width memory die. The memory modules include data-width translators that allow the modules to vary the effective width of their external memory interfaces without varying the width of the internal memory interfaces extending between the translators and associated fixed-width dies. The data-width translators use a data-mask signal to selectively prevent memory accesses to subsets of physical addresses. This data masking divides the physical address locations into two or more temporal subsets of the physical address locations, effectively increasing the number of uniquely addressable locations in a given module. Reading temporal addresses in write order can introduce undesirable read latency. Some embodiments reorder read data to reduce this latency.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
RAMBUS INC.LOS ALTOS, CA1528

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shaefer, Ian San Jose, US 1 0

Cited Art Landscape

Patent Info (Count) # Cites Year
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (1)
2003/0172,243 Variable width memory system and method 8 2002
 
CORPORATION FOR NATIONAL RESEARCH INITIATIVES (2)
2003/0020,173 Radio frequency microelectromechanical systems (MEMS) devices on low-temperature co-fired ceramic (LTCC) substrates 35 2002
2003/0020,173 Radio frequency microelectromechanical systems (MEMS) devices on low-temperature co-fired ceramic (LTCC) substrates 35 2002
 
RPX CORPORATION (1)
7272675 First-in-first-out (FIFO) memory for buffering packet fragments through use of read and write pointers incremented by a unit access and a fraction of the unit access 15 2004
 
RAMBUS INC. (2)
6151239 Data packet with embedded mask 37 1999
6502161 Memory system including a point-to-point linked memory subsystem 381 2000
 
INTELLECTUAL VENTURES II LLC (1)
5906003 Memory device with an externally selectable-width I/O port and systems and methods using the same 7 1996
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