Memory system supporting input/output path swap
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United States of America Patent
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Feb 4, 2014
Grant Date -
Mar 15, 2012
app pub date -
Aug 23, 2011
filing date -
Sep 14, 2010
priority date (Note) -
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Abstract
A memory system includes a controller having first and second input/output terminals, and first and second memory devices each having first and second input/output terminals. The system includes a path selection mechanism for selectively employing one of the first and second terminals of either the controller or the first memory device for communicating a first input/output signal between the controller and the first memory device, and employing the other one of the first and second terminals for communicating a second input/output signal between the controller and the first memory device. The path selection mechanism selectively employs the first and second terminals in accordance with data indicating which of the first and second terminals of the first memory device is connected to the first terminal of the controller and which of the first and second terminals of the first memory device is connected to the second terminal of the controller.
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