
US Patent Application No: 2012/0110,414
Number of patents in Portfolio can not be more than 2000
Memory-Module Controller, Memory Controller and Corresponding Memory Arrangement, and Also Method for Error Correction
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May 3, 2012
Publication date -
Nov 2, 2011
filing date -
13/287,488
serial no -
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Abstract
A memory arrangement comprises a first memory module and a second memory module. An item of information to be written to the memory arrangement is written with a first address both to the first memory module and to the second memory module. When reading, the item of information is read either from the first memory module by means of the first address or from the second memory module by means of a second address differing from the first address. Subsequently a check is made as to whether the item of information is defective. If this is the case, the item of information is read from the respective other memory module.
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