Memory-module controller, memory controller and corresponding memory arrangement and also method for error correction
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 21, 2012
Grant Date -
May 3, 2012
app pub date -
Nov 2, 2011
filing date -
Apr 26, 2006
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory arrangement comprises a first memory module and a second memory module. An item of information to be written to the memory arrangement is written with a first address both to the first memory module and to the second memory module. When reading, the item of information is read either from the first memory module by means of the first address or from the second memory module by means of a second address differing from the first address. Subsequently a check is made as to whether the item of information is defective. If this is the case, the item of information is read from the respective other memory module.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully