Frequency multiplier
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Jul 8, 2014
Grant Date -
May 31, 2012
app pub date -
Nov 29, 2011
filing date -
Nov 30, 2010
priority date (Note) -
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status (Latency Note)
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Abstract
A frequency multiplier includes an input circuit, an output circuit, and a resonance circuit. The input circuit is coupled to an input node and a middle node. The middle node provides a middle signal that has a signal component having the same frequency as an input signal that is provided to the input node. The middle signal further has an even number “n” multiple of the input signal frequency. The output circuit has a predetermined input impedance for the middle node. The resonance circuit includes an inductor that is coupled in series with a capacitor, where the capacitor is in a parallel connection to the middle node. The resonance circuit has a resonance frequency that is equal to a frequency of the input signal, and such resonance circuit also has an output impedance that matches with the predetermined input impedance of the output circuit.
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