DYNAMIC PROTOCOL FOR COMMUNICATING COMMAND AND ADDRESS INFORMATION
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United States of America Patent
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Issued Date -
Jul 26, 2012
app pub date -
Aug 29, 2010
filing date -
Oct 13, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A dynamic serialized command and address (CA) protocol with cycle-accurate matching between the PHY interface and the DFI interface is described. This CA protocol facilitates the use of a common memory-controller control logic with different CA bus configurations. With this CA protocol, CA packets for different memory operations have different formats. The size and the position of the CA packets vary relative to boundaries of DFI clock cycles, and the CA packets can extend beyond DFI clock cycle boundaries. In addition, there are at least two possible formats for a read or write memory operation. The appropriate format is selected based on the immediately preceding memory operation.
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