Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20100200985A1
SERIAL NO

12763378

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A flip chip semiconductor device has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate in electrical contact with the plurality of active devices. A passivation layer is formed over the substrate and intermediate conduction layer. An adhesive layer is formed over the passivation layer. A barrier layer is formed over the adhesive layer. A wetting layer is formed over the barrier layer. The barrier layer and wetting layer in a first region are removed, while the barrier layer, wetting layer, and adhesive layer in a second region are maintained. The adhesive layer over the passivation layer in the first region are maintained until the solder bumps are formed. By keeping the adhesive layer over the passivation layer until after formation of the solder bumps, less cracking occurs in the passivation layer.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • STATS CHIPPAC PTE. LTE.

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cao, Haijing Singapore, SG 41 1466
Lin, Yaojian Singapore, SG 330 9786
Zhang, Qing Singapore, SG 383 3174

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation