WAFER-LEVEL ELECTROMAGNETIC INTERFERENCE SHIELDING STRUCTURE AND MANUFACTURING METHOD THEREOF
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United States of America Patent
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Issued Date -
Sep 27, 2012
app pub date -
Aug 11, 2011
filing date -
Mar 23, 2011
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A wafer-level electromagnetic interference (EMI) shielding structure, which includes: a wafer, an exposed circuit unit, and an EMI shielding unit. The exposed circuit unit is disposed on the top surface of the wafer. At least one conductor is disposed on the exposed circuit unit. The EMI shielding unit has a first EMI shielding layer set around the surrounding surface of the wafer, and a second EMI shielding layer coated to the bottom surface of the wafer. Based on the wafer-level manufacturing process of the instant disclosure, the EMI shielding structure is miniaturized, and each individual wafer is protected against the EMI effect.
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