Cache memory allocation process based on TCPIP network and/or storage area network array parameters

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United States of America Patent

PATENT NO 8601210
APP PUB NO 20120254533A1
SERIAL NO

13073045

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An apparatus comprising a controller, one or more host devices and one or more storage devices. The controller may be configured to store and/or retrieve data in response to one or more input/output requests. The one or more host devices may be configured to present the input/output requests. The one or more storage devices may be configured to store and/or retrieve the data. The controller may include a cache memory configured to store the input/output requests. The cache memory may be configured as a memory allocation table to store and/or retrieve a compressed version of a portion of the data in response to one or more network parameters. The compressed version may be retrieved from the memory allocation table instead of the storage devices based on the input/output requests to improve overall storage throughput.

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Patent Owner(s)

  • AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chakhaiyar, Madhukar Gunjan Bihar, IN 10 100
Dwivedi, Himanshu Bangalore, IN 4 45
Jibbe, Mahmoud K Wichita, US 79 1517

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