Method for forming a dual damascene interconnect structure

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United States of America Patent

PATENT NO 8513114
APP PUB NO 20120276735A1
SERIAL NO

13424954

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Abstract

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An improved method of forming a semiconductor device including an interconnect layer formed using multilayer hard mask comprising metal mask and dielectric mask is provided. To form the second opening pattern being aligned to the first pattern, after the multilayer hard mask is used at the first step, then the dielectric mask is used to form a damascene structure in an insulator layer at the second step followed by removing the metal mask.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tagami, Masayoshi Kanagawa, JP 49 286

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