Memory system with data line switching scheme
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United States of America Patent
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Apr 29, 2014
Grant Date -
Jan 10, 2013
app pub date -
Aug 31, 2012
filing date -
Apr 20, 2009
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Abstract
A storage system includes a three-dimensional memory array that has multiple layers of non-volatile storage elements grouped into blocks. Each block includes a subset of first selection circuits for selectively coupling a subset of array lines (e.g. bit lines) of a first type to respective local data lines. Each block includes a subset of second selection circuits for selectively coupling a subset of the respective local data lines to global data lines that are connected to control circuitry. To increase the performance of memory operations, the second selection circuits can change their selections independently of each other.
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