Striping methodology for maskless lithography

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8473877
APP PUB NO 20130061187A1
SERIAL NO

13225617

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Abstract

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The present disclosure involves a method of performing a maskless lithography process. The method includes receiving a computer layout file for an integrated circuit (IC) device. The layout file contains a plurality of IC sections. The method includes separating the computer layout file into a plurality of sub-files. The method includes striping the plurality of sub-files concurrently using a plurality of computer processors, thereby generating a plurality of striped sub-files. The method includes transferring the plurality of striped sub-files to a maskless lithography system.

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Patent Owner(s)

  • HAYNES AND BOONE, LLP;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Jeng-Horng Hsin-Chu, TW 137 2709
Cheng, Nian-Fuh Hsinchu, TW 13 205
Huang, Wen-Chun Tainan, TW 98 1615
Lin, Tzu-Chin Hsinchu, TW 23 306
Liu, Ru-Gun Hsinchu, TW 388 5792
Wang, Hung-Chun Ching-Suei, TW 35 772

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