Methods for manufacturing integrated circuit devices having features with reduced edge curvature
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United States of America Patent
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Dec 17, 2013
Grant Date -
Mar 14, 2013
app pub date -
Jan 13, 2012
filing date -
Sep 8, 2011
priority date (Note) -
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Abstract
A structure, such as an integrated circuit device, is described that includes a line of material with critical dimensions which vary within a distribution substantially less than that of a mask element, such as a patterned resist element, used in etching the line. Techniques are described for processing a line of crystalline phase material which has already been etched using the mask element, in a manner which straightens an etched sidewall surface of the line. The straightened sidewall surface does not carry the sidewall surface variations introduced by photolithographic processes, or other patterning processes, involved in forming the mask element and etching the line.
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