Address Mapping in Memory Systems
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United States of America Patent
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Issued Date -
Apr 18, 2013
app pub date -
Oct 15, 2012
filing date -
Oct 18, 2011
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Abstract
A memory system includes an address mapping circuit. The address mapping circuit receives an input memory address having a first set of address bits. The address mapping circuit applies a logic function to the input memory address to generate a mapped memory address. The logic function uses at least a subset of the first set of address bits in two separate operations that respectively determine two portions of the mapped memory address.
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