Semiconductor memory device and method for driving the same

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United States of America Patent

PATENT NO 9230615
APP PUB NO 20130100748A1
SERIAL NO

13655077

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Abstract

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In a conventional DRAM, data read errors are more likely to occur along with miniaturization of DRAM A small change in the potential of a first bit line is inverted by a first inverter constituted by an n-channel transistor and a p-channel transistor, and is output to a second bit line through a first selection transistor, which is a first switch. Since the potential of the second bit line is the inverse of the potential of the first bit line, the potential difference between the first bit line and the second bit line is increased. The increased potential difference is amplified by a known sense amplifier, a flip-flop circuit composed of the first inverter and a second inverter (constituted by an n-channel transistor and a p-channel transistor), or the like.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTDJAPAN'S KANAGAWA PREFECTURE ATSUGI CITY ATSUGI-SHI KANAGAWA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Takemura, Yasuhiko Kanagawa, JP 582 31804

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