Efficient command mapping scheme for short data burst length memory devices
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United States of America Patent
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Feb 16, 2016
Grant Date -
Apr 25, 2013
app pub date -
Oct 21, 2011
filing date -
Oct 21, 2011
priority date (Note) -
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Abstract
An exemplary system of the present disclosure comprises a memory controller, a command bus, a data bus, a memory device and a memory. The memory device is coupled to the memory controller by the command bus and the data bus. The memory stores instructions that when executed by the computer system perform a method of requesting data from the memory device. This method comprises receiving a plurality of commands for the memory device from the command bus, the memory device clocked by a clock. At least one command of the plurality of commands includes a first command and a second command within a single clock cycle of said clock. At least one of the first command and second command is a data access command. The first command is executed during a first clock cycle and the second command is executed during a second subsequent clock cycle.
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