Processing unit
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United States of America Patent
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Sep 17, 2013
Grant Date -
Apr 25, 2013
app pub date -
Aug 28, 2012
filing date -
Oct 21, 2011
priority date (Note) -
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Abstract
A processing unit includes: a cache memory including a plurality of memory elements; an error detection circuit configured to detect an error when a first timing for reading data from the cache memory is behind a threshold; a latch circuit configured to set a second timing for latching the data based on an output from the error detection circuit and to latch the data at the second timing; and a processing unit core to process the data latched by the latch circuit.
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