Radiation hardened integrated circuit
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United States of America Patent
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Sep 10, 2013
Grant Date -
May 2, 2013
app pub date -
Nov 1, 2011
filing date -
Nov 1, 2011
priority date (Note) -
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Abstract
A method of forming an integrated circuit (IC) includes providing a substrate having a topside semiconductor surface, wherein the topside semiconductor surface includes at least one of N+ buried layer regions and P+ buried layer regions. An epitaxial layer is grown on the topside semiconductor surface. Pwells are formed in the epitaxial layer. Nwells are formed in the epitaxial layer. NMOS devices are formed in and over the pwells, and PMOS devices are formed in and over the nwells.
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