HIGH-SPEED SYNCHRONOUS WRITES TO PERSISTENT STORAGE
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United States of America Patent
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Issued Date -
May 2, 2013
app pub date -
Oct 28, 2011
filing date -
Oct 28, 2011
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A memory configured to provide a write requestor with a direct write programming interface to a disk device. A first persistent memory is configured for designating at least a portion its memory locations as central processing unit (CPU) load storable memory. The first persistent memory is also configured for receiving write data from the write requestor, for storing the write data in the CPU load storable memory, and for returning a write completion message to the write requestor in response to the storing completing. The memory also includes a second persistent memory that includes the disk device, and a controller in communication with the first and second persistent memories. The controller is configured for detecting the storing of the write data to the CPU load storable memory and for copying the write data to the second persistent memory in response to detecting the storing of the write data.
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