INTEGRATED CIRCUITS WITH CACHE-COHERENCY
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United States of America Patent
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Issued Date -
May 2, 2013
app pub date -
Oct 24, 2012
filing date -
Oct 26, 2011
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Abstract
An improved cache coherency controller, method of operation, and system of such is provided. Traffic from coherent agents to shared targets can flow on different channels through the coherency controller. This improves quality of service for performance sensitive agents. Furthermore, data transfer is performed on a separate network from coherency control. This minimizes the distance of data movement, reducing congestion for the physical routing of wires on the chip and reduces the power consumption for data transfers.
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