Error detection and correction for external DRAM

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United States of America Patent

PATENT NO 9490847
APP PUB NO 20130117631A1
SERIAL NO

13660737

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Abstract

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One embodiment of the present invention sets forth a technique for protecting data with an error correction code (ECC). The data is accessed by a processing unit and stored in an external memory, such as dynamic random access memory (DRAM). Application data and related ECC data are advantageously stored in a common page within a common DRAM device. Application data and ECC data are transmitted between the processor and the external common DRAM device over a common set of input/output (I/O) pins. Eliminating I/O pins and DRAM devices conventionally associated with transmitting and storing ECC data advantageously reduces system complexity and cost.

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Patent Owner(s)

Patent OwnerAddress
NVIDIA CORPORATION2788 SAN TOMAS EXPRESSWAY SANTA CLARA CA 95051

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gruner, Fred Brea, US 26 514
Keil, Shane Santa Clara, US 10 119
Montrym, John S Los Altos Hills, US 65 1521

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