System and method of calibrating a phase-locked loop while maintaining lock

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United States of America Patent

PATENT NO 8638173
APP PUB NO 20130120072A1
SERIAL NO

13296389

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Abstract

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A method of calibrating a phase-locked loop (PLL) while maintaining lock includes detecting that a control signal to an oscillator in a PLL has exceeded a threshold value while the PLL is locked to an input signal. In response, an operating current of the oscillator is adjusted to return the control signal below the threshold value while maintaining lock of the PLL to the input signal. Adjusting the operating current includes slowly varying an output current of a calibration circuit coupled to the PLL, enabling the PLL to maintain lock to the input signal during adjustment of the operating current.

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Patent Owner(s)

Patent OwnerAddress
QUALCOMM INCORPORATED5775 MOREHOUSE DRIVE SAN DIEGO CA 92121-1714

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dang, Nam V San Diego, US 22 266
Kong, Xiaohua San Diego, US 54 434
Murphy, Glenn A San Diego, US 2 9

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