Importance

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Abstract

Disclosed herein is a device that includes a first semiconductor chip outputting a read command and a clock signal, a plurality of second semiconductor chips stacked to the first semiconductor chip, and a signal path electrically connected between the first and second semiconductor chips. Each of the second semiconductor chips performs a read operation to read out a data signal stored therein in response to the read command. Each of the second semiconductor chips includes a counter circuit performing a count operation in response to the clock signal to generate a count signal, and an output control circuit outputs the data signal to the signal path when the count signal indicates a predetermined value. The predetermined values of the second semiconductor chips are different from one another.

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First Claim