Stacked Package And Method Of Manufacturing The Same
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United States of America Patent
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app pub date -
Jan 7, 2013
filing date -
Oct 30, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
In one embodiment, the method includes disposing a first chip over a package substrate. The first chip has at least one first chip pad. The method further includes forming a first bonding wire connected to the first chip pad and the package substrate, and disposing a second chip over at least a portion of the first chip. The second chip has at least one second chip bonding pad. A first bonding wire is formed electrically connected to the second chip bonding pad and the first bonding wire.
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