Semiconductor devices having multi-width isolation layer structures
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United States of America Patent
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Apr 29, 2014
Grant Date -
May 23, 2013
app pub date -
Jul 9, 2012
filing date -
Nov 22, 2011
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Abstract
According to example embodiments, there is provided a semiconductor device including a substrate and an isolation layer structure. The substrate includes an active region having an upper active pattern and a lower active pattern on the upper active pattern. The active region has a first aspect ratio larger than about 13:1 and a second aspect ratio smaller than about 13:1. The first aspect ratio is defined as a ratio of a sum of heights of the upper active pattern and the lower active pattern with respect to a width of the upper active pattern. The second aspect ratio is defined as a ratio of the sum of the heights of the upper active pattern and the lower active pattern with respect to a width of the lower active pattern. The isolation layer structure is adjacent to the active region.
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