Semiconductor devices and methods of manufacturing the same
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United States of America Patent
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May 6, 2014
Grant Date -
May 23, 2013
app pub date -
Sep 5, 2012
filing date -
Nov 23, 2011
priority date (Note) -
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Abstract
A method of manufacturing a semiconductor device including forming on a substrate an insulating interlayer through which a capacitor contact is interposed; forming on the insulating interlayer a first upper electrode having an opening through which the capacitor contact is exposed; forming a first dielectric layer pattern on a lateral wall of the opening; forming a lower electrode on the first dielectric layer pattern formed in the opening and the capacitor contact; forming a second dielectric layer pattern on the lower electrode formed in the opening and the first dielectric layer pattern; and forming on the second dielectric layer pattern a second upper electrode so as to fill the opening and to contact the first upper electrode. The semiconductor device may prevent a lower electrode of a capacitor from collapsing.
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