Signal delay circuit and signal delay method
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United States of America Patent
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Jul 15, 2014
Grant Date -
May 23, 2013
app pub date -
May 25, 2012
filing date -
Nov 17, 2011
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Abstract
A signal delay circuit comprising: a first delay stage, for delaying a first input signal to generate a first delay signal; and a second delay stage, for cooperating with part of delay units of the first delay stage to delay the first delay signal to generate a second delay signal. The signal delay circuit selectively enables the delay stages of the first delay stage or the second delay stage, wherein the signal delay circuit mixes the first delay signal and the second delay signal to generate a first mixed signal when the first delay stage and the second delay stage are both enabled.
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