Apparatus and method for hardware-based secure data processing using buffer memory address range rules
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United States of America Patent
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Jan 27, 2015
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N/A
app pub date -
May 9, 2012
filing date -
May 10, 2011
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Abstract
A processor is utilized for processing data from a buffer memory. The processor, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associate with a secure address range of the buffer memory, to one or more secure locations associated with the secure address range. Further, the processor may block writing of output data, processed based on input data from at least one secure location associated with the secure address range, to one or more insecure locations associated with an insecure address range of the buffer memory.
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