Control method for a semiconductor memory device

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United States of America Patent

PATENT NO 8510632
APP PUB NO 20130132797A1
SERIAL NO

13740724

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Abstract

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To provide a memory array for information bit that stores information bits, a memory array for check bit that stores check bits, a correction circuit that, in response to a write request, reads the information bit and the check bit corresponding to a write address from the respective memory arrays and corrects an error included in the information bit, and a mixer temporarily holding information bit corrected by the correction circuit. The mixer overwrites only a part of bytes of the held information bits with write data according to a byte mask signal. Accordingly, a capacity required for the memory array for check bit can be reduced while the byte mask function is maintained.

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Patent Owner(s)

Patent OwnerAddress
LONGITUDE LICENSING LIMITEDBRACKEN ROAD SANDYFORD FIRST FLOOR BLACKTHORN EXCHANGE DUBLIN D18 P3Y9

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arai, Tetsuya Tokyo, JP 59 576

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