UBM structures for wafer level chip scale packaging
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United States of America Patent
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Apr 8, 2014
Grant Date -
Jun 6, 2013
app pub date -
Dec 6, 2011
filing date -
Dec 6, 2011
priority date (Note) -
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Abstract
A wafer level chip scale semiconductor device comprises a semiconductor die, a first under bump metal structure and a second under bump metal structure. The first under bump metal structure having a first enclosure is formed on a corner region or an edge region of the semiconductor die. A second under bump metal structure having a second enclosure is formed on an inner region of the semiconductor die. The first enclosure is greater than the second enclosure.
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