Packaging process tools and systems, and packaging methods for semiconductor devices

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United States of America Patent

PATENT NO 9543185
APP PUB NO 20130143361A1
SERIAL NO

13309311

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Abstract

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Packaging process tools and systems, and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure for supporting package substrates or integrated circuit die during a packaging process for the integrated circuit die. The mechanical structure includes a low thermal conductivity material disposed thereon.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Ming-Da Jhubei, TW 447 4774
Huang, Kuei-Wei Hsin-Chu, TW 72 1278
Lin, Chih-Wei Xinfeng Township, TW 359 5145
Lin, Chun-Cheng New Taipei, TW 100 1465
Lin, Wei-Hung Xinfeng Township, TW 175 1616
Liu, Chung-Shi Hsin-Chu, TW 824 11367

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