Method of processing solder bump by vacuum annealing

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United States of America Patent

PATENT NO 10784221
APP PUB NO 20130143364A1
SERIAL NO

13312395

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Abstract

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A method includes vacuum annealing on a substrate having at least one solder bump to reduce voids at an interface of the at least one solder bump. A die is mounted over the substrate.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Cheng-Ting Taichung, TW 51 444
Cheng, Ming-Da Jhubei, TW 447 4774
Lin, Chung-Cheng New Taipei, TW 19 57
Lin, Hsiu-Jen Zhubei, TW 172 1408
Liu, Chung-Shi Hsinchu, TW 824 11367
Tsai, Yu-Peng Taipei, TW 43 1203

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