Methods and Systems for Rapid Error Location in Reed-Solomon Codes
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United States of America Patent
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Issued Date -
Jun 6, 2013
app pub date -
Feb 1, 2013
filing date -
Jul 11, 2007
priority date (Note) -
Abandoned
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Abstract
An encoder creates an (p,k,n) n-state codeword with p n-state symbols of which k n-state symbols are data symbols, an n-state symbol being represented by a signal with n>2, p>2 and k>(p−k). Intermediate states of an encoder in forward and in reverse direction are provided in a comparative n-state expression and implemented on a processor. A plurality of signals representing a codeword with at least one n-state symbol in error is processed by the processor by evaluating the comparative n-state expression. A partial result of an expression is determined after a symbol has been received. An error location and an error magnitude or error value are determined. The error is corrected by the processor.
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