Switch block circuit in field programmable gate array
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United States of America Patent
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Nov 18, 2014
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app pub date -
Sep 7, 2012
filing date -
Dec 12, 2011
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Abstract
A switch block circuit in a field programmable gate array is provided. The switch block circuit includes a configuration memory unit including first group memories and second group memories and a switching unit including first group switching transistors and second group switching transistors. The switch block circuit further includes a selection unit for correspondingly connecting the second group memories with the second group switching transistors depending on an operation mode. The switch block is efficiently reconfigurable depending on the intended use, and configuration memories unused in a specific operation mode may be applied to other purposes.
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