Data output circuit and operating method with reduced current overlap for semiconductor device
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United States of America Patent
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Jun 30, 2015
Grant Date -
Jun 13, 2013
app pub date -
Dec 7, 2012
filing date -
Dec 8, 2011
priority date (Note) -
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Abstract
A semiconductor device includes a clock delay unit configured to delay a source clock by a given delay amount and generate a delayed source clock, a driving signal generation unit configured to decide logic levels of first and second driving signals based on a value of input data, to select one of the source clock and the delayed source clock based on current logic levels of the first and second driving signal's, which are detected based on the source clock, and to use a selected clock as a reference of an operation for determining next logic levels of the first and second driving signals, and an output pad driving unit configured to drive a data output pad with a first voltage in response to the first driving signal, and to drive the data output pad with a second voltage in response to the second driving signal.
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