Logic circuit

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United States of America Patent

PATENT NO 9083334
APP PUB NO 20130147519A1
SERIAL NO

13761302

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Abstract

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An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTD398 HASE ATSUGI-SHI KANAGAWA 2430036 ?2430036

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akimoto, Kengo Atsugi, JP 441 44355
Koyama, Jun Sagamihara, JP 1634 57063
Tsubuku, Masashi Atsugi, JP 324 6207

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