Memory system having improved signal integrity
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United States of America Patent
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Feb 18, 2014
Grant Date -
Jun 13, 2013
app pub date -
Feb 8, 2013
filing date -
Aug 7, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
A memory system having improved signal integrity includes a printed circuit board for use in a memory device, N memory semiconductor packages mounted on the printed circuit board, a first switch mounted on the printed circuit board, a controller mounted on the printed circuit board, N first signal lines connecting the semiconductor packages to the first switch such that the semiconductor packages and the first switch are in an N-to-1 correspondence, a second signal line connecting the first switch to the controller, and N selection lines connecting the semiconductor packages to the first switch such that the semiconductor packages and the first switch are in an N-to-1 correspondence. The N selection lines connect the semiconductor packages to the controller and transmit an enable signal. N is a natural number.
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