System and method for controlling central processing unit power with guaranteed transient deadlines
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United States of America Patent
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Nov 3, 2015
Grant Date -
Jun 13, 2013
app pub date -
Feb 5, 2013
filing date -
Dec 16, 2009
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Abstract
Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees for a group of processors to ensure that the processors does not remain in a busy state (e.g., due to transient workloads) for a combined period that is more than a predetermined amount of time above that which is required for one of the processors to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of one or more of the processors based on a variable delay to ensure that the multiprocessor system only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processors.
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