Methods and Systems for Repairing Interior Device Layers in Three-Dimensional Integrated Circuits
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United States of America Patent
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Issued Date -
Jul 4, 2013
app pub date -
Dec 19, 2012
filing date -
Dec 28, 2011
priority date (Note) -
Abandoned
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Abstract
A three-dimensional integrated circuit (3D-IC) includes a stack of semiconductor wafers, each of which includes a substrate and a device layer. Programmable components, such as memory arrays or logic circuits, are formed within the device layers. Some of the programmable components are redundant, and can be substituted for defective components by programming passive memory elements in a separate conductive layer provided for this purpose. The separate conductive layer is devoid of active devices, and is therefore relatively reliable and inexpensive.
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