PROCESS FOR MANUFACTURING A WAFER BY ANNEALING OF BURIED CHANNELS

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United States of America Patent

SERIAL NO

13684057

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Abstract

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A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS S R LAGRATE BRIANZA (MB)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
BARLOCCHI, Gabriele Cornaredo, IT 56 775
CORONA, Pietro Roma, IT 25 380
VILLA, Flavio Milano, IT 53 714

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