LDMOS DEVICE WITH FIELD EFFECT STRUCTURE TO CONTROL BREAKDOWN VOLTAGE, AND METHODS OF MAKING SUCH A DEVICE
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United States of America Patent
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Issued Date -
Oct 24, 2013
app pub date -
Apr 23, 2012
filing date -
Apr 23, 2012
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
In one embodiment of an LDMOS device disclosed herein, the device includes a source region, a drain region and a gate electrode that are formed in and above a semiconducting substrate, wherein the gate electrode is generally laterally positioned between the source region and the drain region, a metal-1 field plate positioned above the gate electrode, and a silicide block layer that is positioned in an area between the gate electrode and the drain region. The device further includes at least one source contact that is conductively coupled to the metal-1 field plate and a conductive structure that is conductively coupled to the metal-1 field plate, wherein at least a first portion of the conductive structure extends downward toward the substrate in the area between the gate electrode and the drain region.
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