Importance

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Abstract

Provided are a memory control apparatus and a memory control method. In the memory control apparatus and memory control method, data are distributively stored in a plurality of banks in sequence, and the corresponding data are written to or read from the memory, based on row address information obtained by exchanging a portion of row information and bank information with each other. According to the invention, if a new row begins when the host or the processor accesses the memory, a host or a processor accesses another bank, and thus the block data can be read or written without a waiting cycle. In addition, the memory control apparatus and the memory control method can be implemented with low complexity available through simple address conversion in the memory control apparatus.

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First Claim