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United States of America Patent

APP PUB NO 20130299764A1
SERIAL NO

13469103

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A device is disclosed. The device includes a gate disposed on a substrate in a device region, the gate having first and second sidewalls. The gate includes a gate electrode and a resistive layer disposed between the gate electrode and substrate. First doped regions of a first polarity type are disposed in the substrate adjacent to the first and second sidewalls of the gate. The gate overlaps the first doped regions by a first distance to form overlap portions. A portion of the resistive layer between the gate electrode and overlap portions form first and second storage elements of a multi-bit resistive memory cell.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES SINGAPORE PTE LTD60 WOODLANDS INDUSTRIAL PARK D STREET 2 SINGAPORE 738406

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
QUEK, Elgin Singapore, SG 125 2318
TAN, Shyue Seng Singapore, SG 99 974
TOH, Eng Huat Singapore, SG 244 1562

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