Integrity of an address bus

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9009570
APP PUB NO 20130332783A1
SERIAL NO

13490633

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Abstract

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A method for improving address integrity in a memory system generates error correction data corresponding to a memory address. The error correction data is transmitted to a memory device over an address bus coincident with transmitting a no-operation instruction over a command bus.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT633 WEST FIFTH STREET 24TH FLOOR LOS ANGELES CA 90071

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Troia, Alberto Carlentini, IT 218 778

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