Architecture for Single-Stepping in Resonant Clock Distribution Networks
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United States of America Patent
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Issued Date -
Jan 2, 2014
app pub date -
Dec 13, 2012
filing date -
Oct 12, 2009
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Abandoned
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Abstract
A resonant clock distribution network architecture is proposed that is capable of single-step operation through the use of selective control in the resonant clock drivers and the deployment of flip-flops that require the clock to remain stable for a sufficiently long time between any two consecutive state updates. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs.
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