PROCESSOR AND CONTROL METHOD THEREOF
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United States of America Patent
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Issued Date -
Jan 23, 2014
app pub date -
Jun 3, 2013
filing date -
Jul 19, 2012
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An processor includes: multiple arithmetic processing sections to execute arithmetic processing; and multiple registers provided for the multiple arithmetic processing sections. A register value of a register of the multiple registers corresponding to a given one of the multiple arithmetic processing sections is changed if program execution by the given one of the multiple arithmetic processing sections reaches a predetermined location in a program, and priorities of the arithmetic processing sections are dynamically determined in response to register values of the registers.
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